My Resume

ALEXANDRA J. FORSYTHE
 
SUMMARY
Electrical and computer engineer with 5 years of industry experience in SoC, analog and digital circuit design, CCA design, PCB (PWB) layout, build, test, and embedded systems.
 
SKILLS

SoC design, analog circuit design, digital circuit design, Verilog, VHDL, RTL, ASIC, FPGA, Cadence, Eagle CAD, Altium, DxDesigner, PADS, LT SPICE, Perl, VLSI, SOC, CMOS, ARM, DSP, embedded systems, UART, C, C++, Python, Java, Linux, Agile, Scrum, MATLAB, Synopsis ICC2, TCL
 
WORK EXPERIENCE
 
Intel Corporation, Hillsboro, Oregon                                   May 2019 to Present
Electrical Design Engineer
SoC (System on a Chip) Structural Design Team
  • Performed Structural Design Health Checks (SDHCs) on various SoC device partitions using APR (Advanced Package Router) tools. Created SDHCs specs, documented settings, and developed solutions for errors found in ported SDHCs.
  • Designed a script that yielded a file of compiled information from all floorplan quality checks to improve the ability to troubleshoot errors in partitions. Based on the output, created a CSV file while producing an easier-to-read version of the errors generated.
  • Developed a script to augment the floorplan quality check script and the flow file. Created a flow file and script to allow the floorplan quality checker script to be run automatically in parallel on multiple partitions. Added checking to ensure collateral was in place before launching.
  • Originated a script to identify the list of physical ports fanning into and/or out of a given hierarchy then output the list of those ports.
  • Constructed a script to generate a summary of Layout Verification (LV) checks from any applicable file and output as a CSV format with only relevant rows and information.
  • Generated Python script to create placement order of bumps from a given CSV file and generated placement results with special cases and automated bus expansion.
Electrical Design Engineer
SoC Clock Design Team
  • Worked with a design team to develop next-generation CPU and SOC designs for the Devices Development Group, including micro-architecture, IP integration, circuit design, and timing convergence.
  • Ran Synopsis ICC2 checkers and a proprietary clock simulation tool on physical clock routes on DDR, MEMS, and SOC designs; Fixed any issues that arose by correcting the layout.
  • Reviewed the results of the clock tool, then developed possible solutions for high skew and high delay clock routes.
  • Migrated proprietary scripts to create physical routes from Verilog inputs in support of next generation designs.
  • Developed front-end Python-based web tool for visualizing outputs of clock simulation and routing path simulation tools to enable faster and more efficient routing analysis.
 
Ultra Electronics USSI, Columbia City, IN                            March 2018 to May 2019
Electrical Engineer                                                 
  • Design of digital electronics, simulation, fabrication, assembly, and testing of designs and embedded software.
  • Responsible for adding a daughter board to the controller board of an HS-10 to enable wireless streaming, and for updating the software to enable streaming via Bluetooth.
  • Developed schematics and generated Gerber files for PCB fabrication.
  • Peer reviewed schematic and board layout; revised schematics and run board level design rule checks (DRC). Worked with team to select and order parts for a new design project.
 
Raytheon, Fort Wayne, IN                                                 May 2018 to August 2018
Electrical and Computer Engineer                                   
  • Part of team developing dynamic software for an autonomous collaborative system that will use artificial neural networks to enable UAVs (unmanned aerial vehicles) to work together to accomplish tasks and utilize the unique strength of each UAV. Wrote over 1700 lines of code.
 
NASA Langley, Hampton, VA                                           May 2017 to August 2017
Electrical Engineer                                                 
  • Designed an analog mission-critical circuit board that will be used on a lander.
  • Evaluated design architectures for a DC-DC buck converter for Navigation Doppler Lidar (NDL).
  • Created designs for highly efficient power and that fit within a minimal area.
  • Additional projects involved developing component models with Altium, running LTSpice simulations, Webench simulations (SPICE - based simulator), Cadence, and improving pre-existing circuit designs.
 
Forsythe Engineering                                                    October 2015 to present
Systems and Electrical Engineer                                                  
  • Design, build, and manage complex systems including software, hardware, and mechanical.
  • Design and sell custom circuit boards across the country.
  • Projects include fully functional R2-D2, Raspberry Pi supercomputer (Beowulf), and particle accelerator (CRT).
 
EDUCATION
B.S. in Electrical Engineering; minors in Math and Computer Science
Overall GPA: 4.0/4.0


LEADERSHIP AND AWARDS

  • Winner of 7 Intel Corporation Recognition Awards for outstanding work performance (2019 – 2020)
  • National STEM Role Model (2018-2020)
  • Engineering Study Abroad (Germany)
  • National Women in Computing Award (2018)
  • Alpha Chi National Honor Society - top 10% of college juniors, seniors, grad students in the U.S.
  • Presidential and Gill Scholar (full ride scholarship for outstanding academic performance, leadership, and community service)
  • VP of IEEE, VP of ACM, President of Math Club
  • Student Executive Board Chair, CAD Mentor, Peer Mentor
  • Member of SWE, SAE, AIAA, and SSPI
 
COMMUNITY SERVICE

STEM Teacher (Coder Dojo, BeWISE and DoD STARBASE STEM Camps, Tech Engineering Camp).
Portland Audubon fundraising team. Limberlost State Historic Site Program Developer since 2013.
Keynote speaker, editor, and author for several nonprofit organizations since 2012.