Download a copy of my resume here:
ALEXANDRA JEANELLE FORSYTHE
Email: AlexandraForsythe@IEEE.org / AlexandraJForsythe@gmail.com
Electrical and computer engineering student with a 4.0 GPA and 3 years of industry experience in PCB (PWB) layout, CCA design, build, test, and embedded systems. Searching for a 2020 summer internship.
Verilog, VHDL, ASIC, FPGA, Cadence, Eagle CAD, Altium, DxDesigner, PADS, LT SPICE, Perl, VLSI, CMOS, PLC, ARM, DSP, embedded systems, UART, C, C++, Python, Java, HTML, Linux, Agile, Scrum, MATLAB
Intel May 2019 to August 2020
Design Engineer (Summer Intern)
Work with a design team to develop next-generation CPU and SOC designs for the Devices Development Group, including micro-architecture, IP integration, circuit design, and timing convergence.
Ran Synopsis ICC2 checkers and a proprietary clock simulation tool on physical clock routes on DDR, MEMS, and SOC designs; Fixed any issues that arose by correcting the layout.
Reviewed the results of the clock tool, then developed possible solutions for high skew and high delay clock routes.
Migrated proprietary scripts to create physical routes from Verilog inputs in support of next generation designs.
Developed front-end Python-based web tool for visualizing outputs of clock simulation and routing path simulation tools to enable faster and more efficient routing analysis.
Ultra Electronics USSI March 2018 to May 2019
Electrical Engineer (Year-round intern)
Design, simulate, fabricate, assemble, and test electronic designs.
Design, develop, implement, and test embedded software.
Responsible for adding a daughter board to the controller board of an HS-10 to enable wireless streaming, and for updating the software to enable streaming via Bluetooth.
Developed schematics and generated Gerber files for PCB fabrication.
Peer reviewed schematic and board layout; revised schematics and ran board level design rule checks (DRC). Worked with team to select and order parts for a new design project.
Raytheon May 2018 to August 2018
Electrical and Computer Engineer (Summer Intern)
Part of team developing dynamic software for an autonomous collaborative system that will use artificial neural networks to enable UAVs (unmanned aerial vehicles) to work together to accomplish tasks and utilize the unique strength of each UAV.
Wrote over 1700 lines of code.
NASA Langley May 2017 to August 2017
Electrical Engineer (Summer Intern)
Designed a mission-critical circuit board that will be used on a lander.
Evaluated design architectures for a DC-DC buck converter for Navigation Doppler Lidar (NDL).
Created designs for highly efficient power and that fit within a minimal area.
Designed circuits; developed component models with Altium; ran LTSpice simulations.
Additional projects involved analysis, Webench simulation (SPICE - based simulator), Cadence, and correcting an existing buck regulator design.
Forsythe Engineering October 2016 to present
Design, build, and manage complex systems including software, hardware, and mechanical.
Custom circuit boards are sold and distributed across the country; over 100 units sold since 2016.
Projects include full-size, fully functional R2-D2, Raspberry Pi supercomputer (Beowulf), and particle accelerator (CRT).
B.S. in Electrical Engineering; minor in Math. B.S. in Computer Engineering; minor in Computer Science.
Indiana Tech Presidential and Gill Scholar. Overall GPA: 4.0/4.0
LEADERSHIP AND AWARDS
National Women in Computing Award (2018), VP of ACM (2018-19), VP of IEEE (2018-19), President of Math Club (2018-19), Student Executive Board Chair (2018-19), Peer Mentor (2019), CAD Mentor (2018-19), Engineering Study Abroad Scholarship (Germany), 2018 National STEM Role Model, Member of SWE, SAE, and SSPI,
Alpha Chi National College Honor Society (top 10% of college juniors, seniors, grad students in the U.S.)
STEM Teacher (Coder Dojo, BeWISE and STARBASE STEM Camps, Tech Engineering Camp); Portland Audubon fundraiser; Limberlost State Historic Site Program Developer; Keynote speaker, editor, and author for several nonprofit organizations